Selective area growth is a process where semiconductor material is epitaxially grown in features that are lithographically fabricated (e.g., trenches etc.). These features are often referred to as growth windows. With this process, dissimilar materials can be integrated on a single substrate. However, it can be difficult to obtain high quality growth with selective area growth.
One common source of difficulty in selective area growth is simultaneous growth on the bottom and side walls of a trench. This usually leads to poor results, such as electrical shorts in p-n junctions, and lack of planarity in fabricated devices, among others.
One approach for dealing with this is to fabricate a spacer layer at the side walls of the growth windows. By choosing the spacer layer to be a material on which growth of the semiconductor material does not occur (e.g., an oxide layer), the problem of lateral growth during selective area growth can be alleviated. U.S. 2012/0219250, hereby incorporated by reference in its entirety, provides an example of this approach.
However, we have found that difficulties can remain, even with a side wall protective layer. Accordingly, it would be an advance in the art to alleviate these difficulties.